Silicon Access revs up new packet processor

Introducing a new product with the expectations that it will blow the minds of the likes of Nortel and Cisco, San Jose, Calif.-based Silicon Access Networks has released a new processor that claims to be twice as fast as current products.

The semiconductor solutions company last month announced its iFlow Packet Processor (iPP), a network packet processor that supports full-duplex data ranges of 20Gbps. The iPP is the newest addition to the iFlow DP3 family of products designed to deliver routers and switches with the highest port density, lowest chip count and lowest power consumption currently possible, the company said.

“The iPP represents the first truly optimized processor for packet processing applications,” said Mitch Kahn, vice-president of marketing for Silicon Access. “It will deliver at least two times the performance of other network processors in the same time frame and is 30 to 50 times faster than general purpose processors for performing networking operations.”

Khan added that by implementing a multi-processor architecture based on an in-house designed network-specific processor, Silicon Access has eliminated the inefficiencies of Reduced Instruction Set Computers (RISC)-based approaches.

“RISC-based designs suffer from the fact that the very instructions they execute were designed to run Unix and Windows and calculate spreadsheets. They were not designed to process packets and because of this they are horribly inefficient. For example, it takes a RISC processor, on average three an a half times longer to perform the same amount of work as our purpose-built packet processor. In some cases we are 100 times faster.”

Kahn said that Silicon Access has developed the iFlow Packet Processor to suit the needs of network equipment vendors like Nortel and Cisco. He said that the most common uses are in applications like router acceleration cards and line cards

“For router acceleration cards, by offering a card based on our iPP processor, an existing router could be accelerated to 30 to 50 million packets per second, for example.”

Dan McLean, research analyst with Toronto-based IDC Canada, said the iFlow Packet Processor appears to be impressive.

“Silicon Access’s product seems to have some impressive statistics on data throughput and sounds as though it has a high degree of efficiency (in terms of low power consumption),” he said.

The iPP operates at speeds up to 333MHz and the transistor chip integrates 32 multi-threaded packet processors, all packet buffer memory, 4Mbps of scratch pad memory, all instruction RAM and a 1Kx72-bit general purpose ternary CAM. The 6.4Gbps high-speed co-processor channels allow the iPP interface to up to five network co-processors simultaneously.

The iFlow Packet Processor will be available in Q1 of 2002, and is priced at US$1,000 in high quantities. For more information, visit the company on the Web at

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