IBM signs chip manufacturing deal with Chartered

Contract chip maker Chartered Semiconductor Manufacturing Ltd. on Wednesday announced a three-year 300-millimetre manufacturing and technology development agreement with IBM Corp.

“We believe that cost-effective 300-millimetre manufacturing capability will become a key differentiator in our industry,” said Chia Song Hwee, president and chief executive officer at Chartered, in a conference call with analysts and media Wednesday.

Chartered, which lags far behind rivals Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) and United Microelectronics Corp. (UMC) in semiconductor manufacturing using 300-millimetre (12-inch) wafers, sees the deal with IBM as a chance to make up some ground in the market.

“We expect that both parties will be able to gain early scale and cost efficiency on 300-millimetre manufacturing while at the same time reducing risk,” Chia said.

The shift to 300-millimetre wafers from 200-millimetre (8-inch) wafers offers significant cost savings for chip makers. The larger wafer size allows more chips to be produced on each silicon wafer and is expected to drive down production costs by up to 35 per cent once these chip fabrication plants (fabs) are up and running. When combined with advanced process technologies, which allow chip makers to shrink the size of a chip and produce more chips on each wafer, these cost savings can be even greater.

The major problem with building 300-millimetre fabs is cost, with the price of each facility running into billions of dollars in construction and equipment costs. This has forced many chip makers, such as UMC and Advanced Micro Devices Inc., to invest in joint ventures to share the cost of constructing 300-millimetre fabs.

The deal with IBM will give Chartered access to 300-millimetre manufacturing capacity using IBM’s 90-nanometer process technology from the third quarter of next year and ease some of the competitive pressure it faces from TSMC and UMC, the companies said in a statement. Chartered has been hit hard by ongoing financial losses resulting from a downturn in semiconductor demand, while TSMC and UMC have managed to remain profitable through much of the downturn and already have their own 300-millimetre wafer fabs up and running in Taiwan.

Chartered, in Singapore, has yet to complete fitting out its own 300-millimetre fab, Fab 7, and will be able to delay the start of production at Fab 7 for up to a year and reduce its capital expenditures for the plant next year as a result of the deal with IBM, Chia said. The company now expects to incur start-up expenses for Fab 7 during the fourth quarter of 2004.

At the same time, Chartered will be able to offer its customers access to capacity in IBM’s 300-millimetre fab in East Fishkill, N.Y. Chartered will be able to produce sample wafers for customers during the first half of 2003, with commercial production using IBM’s 90-nanometer process expected to begin during the third quarter, Chia said.

Chartered’s engineers will also be able to gain 300-millimetre manufacturing experience during 2003 through the deal with IBM, he said.

In return, IBM expects to utilize some capacity in Chartered’s 300-millimetre Fab 7 starting from 2005. While IBM’s East Fishkill fab is currently running at a utilization rate of 100 per cent and is expected to remain full through the middle of next year, the plant is currently running at less than 50 per cent of its planned capacity as production is still being ramped up. The deal with Chartered will help to absorb some of that additional production capacity when it comes online, said John Kelly, senior vice-president and group executive at IBM Technology Group, in a separate conference call.

To secure access to IBM’s 300-millimetre manufacturing capacity, Chartered has paid an undisclosed refundable deposit to IBM which the company said will be offset by the reduction in capital expenditures for its Fab 7 plant.

In addition to giving each company access to manufacturing capacity, IBM and Chartered will jointly develop 90-nanometer and 65-nanometer processes for production on 300-millimetre wafers. Down the road, the companies said an option exists to extend that agreement to include 45-nanometer process technology.

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