HP eyes PICO system to reduce design time

Hewlett-Packard Co. (HP) has begun tests of a new system that dramatically cuts the design time, cost and power consumption of devices such as Internet appliances, personal digital assistants (PDAs) and printers.

The “program in, chip out” (PICO) technology developed by Hewlett-Packard Laboratories (HPL) focuses on reducing the time required to design embedded computing systems for so-called smart products.

HP is applying the principles of mass customization to semiconductor design. To be successful in the smart products space, companies need to be able to “design lots of highly customized computer systems, each one customized to a particular smart product for a particular application,” said Bob Rau, a senior research scientist with HP. Rau is also manager of compiler and architecture research at HPL’s Computer Research Center.

“You need very high performance in many cases, and you also need low cost so that it can be a consumer product, and the only way you can achieve that is by customizing the computer system to the particular application, so you throw away what is not needed, and provide only what is required,” Rau said.

The same forces that have pushed the computer industry away from mainframes through minicomputers and workstations to the ubiquitous PC will drive the market for embedded customized technology.

“For the very same reasons, that is higher levels of integration, it will continue to move down to the next level which is embedded computing, where you have computers embedded within products making them smaller, intelligent and with more functionality,” Rau said.

HP will initially use its PICO technology in-house, and may subsequently offer it as a service or as a tool to other companies designing devices using embedded computing.

PICO cuts down design time by automating parts of the process. It takes code written in the common programming language C, and automatically designs a best-fit custom EPIC (Explicitly Parallel Instruction Computing) processor and custom accelerator for it. It also retargets the PICO C compiler for the custom processor, according to Vinod Kathail, project manager for compiler and architecture research at HPL.

Typical applications for the system might be hard wiring a speech recognition or image-processing algorithm.

The EPIC architecture, co-developed by HP and Intel Corp., is the foundation for Intel’s IA-64 processor architecture. PICO also utilizes a “design space walker” to evaluate design options on a number of parameters including performance, cost, smaller chip size, and low power consumption.

The PICO output, which is the detailed design of the embedded computer system for the device, including the custom EPIC processor optimized to run the application for the device, is specified in VHDL, a hardware description language used in electronic design automation to describe a set of circuits for fabrication.

PICO allows designers to develop computer architectures for Internet appliances and other devices that will be optimized on cost and performance to target market niches and vertical applications, according to HP. By replacing time-consuming manual design with automatic processes, the new design technology ensures that the growing demand for custom embedded systems for a large variety of products will be met, according to Rau.

“When you think of trying to design highly customized computer systems, each one customized for a particular smart product, and you think of doing that on a very wide scale, you have to automate the process,” Rau said.

Hewlett-Packard Laboratories, in Palo Alto, Calif., can be reached at http://hpl.hp.com/.