IBM plans chips to speed Unix servers

IBM Corp. on Friday shed more light on future generations of its high-end server chips, saying it hopes to stretch the chips down to the lower end of its hardware line and alter the processor architecture to allow it to take on some tasks that are usually handled by software.

IBM rolled out its 64-bit Power4 processor last year and received praise from analysts for the strong performance of the chip in its top-of-the-line p690 server running AIX, IBM’s version of Unix. The Armonk, N.Y., company will build on the Power4 architecture in the coming years with the release of speedier and more complex Power5 and Power6 chips due out in 2004 and 2006, respectively, said Joel Tendler, program director of technology assessment at IBM.

“We have said the Power4 would be a game changer,” Tendler said. “We are going to build on that base and enhance the capabilities and performance of the chip over time.”

After falling behind Sun Microsystems Inc. and Hewlett-Packard Co. in the Unix market, IBM has reinvigorated its Unix servers on the back of its Power4 technology. Offered currently in its top-tier p690 and p670 servers, the chip should make its way into IBM’s entire Unix line by the end of this year, Tendler said. This could put more pressure on chief rival Sun, which already has its UltraSPARC III chips in both high-end and entry-level products.

“IBM is definitely throwing a lot of technology into the Power series and really challenging Sun,” said Kevin Krewell, a senior analyst at MicroDesign Resources. “I think IBM is coming on very strong.”

With the arrival of Power5, users should find a chip that runs at close to 2GHz and is equipped with two key technologies for speeding software performance.

First, IBM will introduce with the Power5 its Fast Path technology, which lets some basic functions associated with network traffic be handled by the chip itself instead of relying on software to complete the tasks.

“One of the things we see is that a lot of resources are consumed by a processor in handling data movement from the IP (Internet Protocol) stack,” Tendler said. “Those kinds of functions will be built into Power5.”

Some instructions associated with network protocols such as TCP/IP will be handled by the Power5 chip, saving valuable CPU (central processing unit) resources that are often sucked up by software.

The Power5 also will mark the introduction of IBM’s “simultaneous multithreading” technology, which makes a single processor appear as if it were two processors to the software it is running.

IBM also plans to add various forms of its eLiza technology for predicting and sometimes automatically fixing hardware errors. The Power5 chip will contain several error-checking tools that can help the chip recover from a problem on the fly and force the chip to redo operations if a problem is detected, Tendler said.

Tendler would not provide many details on Power6 because it is in the early stages of development, but he said the overall goal with the Power family of processors is to stretch it as far as possible across IBM’s servers. At some point, IBM expects the Power chips to make their way into compact blade servers.